[Mep-dev] FPGA 1.1 drawing and questions

[Bob McGwier]

Do you have Matlab?  Or octave?  

Bob 

Sent from my Verizon Wireless BlackBerry

-----Original Message-----
From: Paul Williamson <paul.kb5mu at gmail.com>
Date: Thu, 15 Apr 2010 21:15:07 
To: Bob McGwier<rwmcgwier at gmail.com>
Cc: mep-dev at uppermeadow.com<mep-dev at uppermeadow.com>
Subject: Re: [Mep-dev] FPGA 1.1 drawing and questions

This sounds really useful! Can you provide more details, or a reference to a paper, or the source code for an implementation, or something we can refer to?

73. -Paul KB5MU


On Apr 2, 2010, at 7:16 AM, Bob McGwier <rwmcgwier at gmail.com> wrote:

> In the FPGA prior to the costa's loop you will need a nonlinear 
> equalizer and DC elimination.   The QSD, done in this case with some 
> fairly high speed switches and baseband filtering most likely,  will 
> have both amplitude and phase imbalance in the I/Q legs and further,  it 
> is frequency (rate of switching the sampling "capacitors") dependent.
> 
> I have devised an algorithm which really makes the difference in the 
> performance of these devices (out of necessity).  Especially for digital 
> signals, this is imperative.
> 
> Suppose Z is the incoming signal AFTER the QSD.  Z* (complex conjugate) 
> is taken, and a filter is applied to Z*, and the applied to a delayed 
> copy of Z.  This sufficiently eliminates the image rejection imbalance 
> to make it an unimportant part of the communications system.
> 
> An ASSUMPTION of the algorithm is that there is NO DC component, so it 
> must be eliminated before  F(Z*)(n) is applied to Z(-n) and the 
> reestimation of F is done.